On the SPI wizard, I write a program that should interact with the slave: send and receive data. There are no problems with sending, but with reception there are unresolved, dimly lit questions in the literature.
The SPI master transmits a byte: a clock information signal. Slave sees the clock signal and starts receiving this byte. But if he has data to transmit, can he transmit it to the same clock signal? Will their controller take over? And if the slave does not transmit data at this moment, will the controller accept 0xff?
Now the situation is different. The slave has the data that it prepared for transmission in response to the master's request, and waits for a clock signal to transmit it. How does the clock signal appear on the line? Should master pass 0xff? After all, the master does not have a register with which it would be possible to issue a clock signal without data transmission, and reading the buffer register only returns the last received byte, and does not generate a clock signal.
But suppose the slave began transmitting data under the master clock signal. Will he accept 0xff at this moment?
Used controller 1982E92U (Milandr).