I need to know the full interrupt handling algorithm, I found this algorithm on the Internet, is it correct? If not, how will it be right?

  1. The request is stored in the register IRR
  2. Ignore all requests that are masked in the IMR register.
  3. If there is at least one request, the request with the highest priority is taken and compared with the ISR register, to what priority the interrupt is currently performed
  4. If the interrupt priority is higher, a signal is sent to the processor and a response is expected.
  5. Having received the answer, the bit is reset in IRR with high priority and the corresponding one is set in ISR
  6. An interrupt code is sent to the processor.
  7. At the end of the interrupt bit is reset in the ISR
  • In assembly language, everything is happening. - Yury Bakharev

1 answer 1

The described action makes the equipment. In interrupt processing, you need to do the necessary actions as soon as possible and indicate that the interruption has been processed. For LAPIC, write zero at the address specified at offset 0x2C from the LAPIC base specified in MSR 0x1B. See APIC and EOI Register in particular.

  • And you can find out how the IRR and ISR registers are compared, I mean, what kind of operation is being performed? - Alex Polev
  • The programmer should not be interested. This is for hardware developers. I have already written about LAPIC, and in the case of LegacyPIC, use the command sequence mov al,20h out 20h,al for the primary controller and mov al, 20h out A0h, al out 20h, al for the secondary controller. Iret is enough for software interrupts - Adokenai