Difficulties in understanding the representation of memory.
Task: Suppose you have an architecture with a 32-bit logical address space (that is, a logical address is a 32-bit number). The architecture uses a 2-level page table, i.e., the logical address is divided into three sections: two indexes in the page table and an offset (exactly as it was in the example on the slides).
And in the tables at each level of the page table exactly 1024 entries (respectively, the index in each table takes 10 bits), and you use pages of 4096 bytes in size (i.e. the offset is a 12-bit number, it is easy to notice that together we get 32 bits = 10 + 10 + 12).
Attention question (it is not necessary to answer it specifically): if the process uses only two sections of the logical address space: 4MB, starting with the logical address 0x0, and 2MB, starting with the address 0xbfe00000, how many entries in the root table will point to the next level tables? 
My understanding of this task (please indicate and correct errors):
1) Lvl1 and Lvl0 index take up 10 bits each, Offset 12.
2) Each table labeled Level Num holds 1024 entries of something and indexes of 10 bits (in the scheme, only 10 bits in the size of each cell were indicated. It is assumed that there are + n more bits). So the indexes occupy 1024 * 10/8 bytes, which is equal to 1280 bytes. The total table is 4096 bytes, so some other data of 2816 bytes is stored in the table.
3) At this point, stupor. I do not understand how to connect these 4MB and logical addresses with the information above.
I ask you to explain the principle of the memory and give an explanation to the task. Specifically, the solution to the task, please do not write, because my goal is to understand, and then give the answer myself.